Technology

The World's First 2D Semiconductor Pilot Line Is Here — And It Skips EUV Entirely

Updated 2026

A Shanghai startup called Yuanjiwei has switched on what it describes as the world's first 8-inch pilot production line built for two-dimensional (2D) semiconductors. The claim matters because it points to a different road to advanced chips — one that does not depend on the extreme-ultraviolet (EUV) lithography machines that have become the gatekeeper of cutting-edge manufacturing.

Conventional chips are carved from silicon wafers that are three-dimensional slabs. 2D semiconductors are atomically thin films — sheets just one or a few atoms thick, most famously molybdenum disulfide (MoS₂). Because the active layer is so thin, many of the steps that demand extreme precision in silicon can be rethought, and the company says its process is designed to scale from a 500-nanometer pilot design kit toward silicon-equivalent performance without EUV at all.

Why 2D materials are a big deal

Atomically thin means fundamentally different physics. In bulk silicon, current leaks through the material as transistors shrink, which is why the industry keeps chasing smaller, more expensive lithography. A single-layer 2D crystal has no "below" for electrons to escape into, so it can stay switched off cleanly even at nanometer scales. That is the property researchers have chased for over a decade in the lab.

The bottleneck was never the science — it was manufacturing. Growing and patterning 2D films across an entire wafer, then wiring them into real circuits, has resisted factory-scale production. Yuanjiwei's pilot line reportedly covers the full chain, from raw material preparation through device integration and tape-out services, which is the step that has historically kept 2D electronics on laboratory benches.

What the roadmap actually claims

The company released version 0.1 of its process design kit for the 500nm 8-inch line and opened foundry tape-out services. Its stated goal is a manufacturing process comparable to a 90nm silicon node by the end of 2026, then a fully domestic process it equates to 5nm-class chips by 2029 — all without EUV. Those are company targets, not independent benchmarks, and should be read as ambition rather than proven capability.

The strategic angle. EUV scanners are supplied by a single vendor and subject to tight export controls. A viable path to advanced chips that routes around EUV would reshape the geography of semiconductor power. Even if 2D lines never match the densest silicon, they could open a domestic, controllable supply for a meaningful slice of the chip market.

The open questions. Yield, uniformity across an 8-inch wafer, and integration with the rest of a chip stack remain unsolved at scale. History is littered with "first pilot lines" that stayed pilots. What makes this one worth watching is that it is the first attempt to run the complete 2D flow as a production line rather than a research tool.