Technology — Computer Architecture

How a Student-Built CPU Learned to Run Doom

Running a real 1993 video game on a processor you designed yourself at the logic-gate level is less a party trick and more a masterclass in every problem that any modern computer has to solve.

• The team built a five-stage pipelined CPU from scratch — fetch, decode, read, execute, writeback — and deployed it on an FPGA chip.
• Doom's 14-megabyte file far exceeded the on-chip memory available, forcing a full memory subsystem to be designed: DDR3, two caches, and a memory arbiter.
• The project turned from a novelty into a genuine engineering case study the moment it had to reconcile a fast processor with a slow memory.

A video of Doom running on a custom CPU drew millions of views, but the headline is a distraction. What actually happened is that a small team at MIT walked through, in hardware, the entire chain of compromises that turn a block diagram on a textbook into a machine that runs software. They designed the processor at the logic-gate level, connected it to peripherals, adapted the Doom source code, and mapped the whole thing onto a field-programmable gate array — a reconfigurable silicon chip that can be wired up to behave like any processor the designer imagines.

Most of the engineering was not about the CPU itself but about the gap between the processor's speed and the memory it talks to. An ideally pipelined CPU wants a new instruction and a new data word every single cycle. The DDR3 memory on the FPGA, by contrast, returns two words every 30 to 60 cycles. The fix is the same one used in virtually every computer on Earth: a cache. The team added a separate instruction cache and data cache, each with tags to prevent address collisions and a writeback mechanism for modified lines. They then had to build a memory arbiter so that, when both caches demanded the single DDR3 chip at once, one would queue politely rather than deadlock the system.

The project matters because it makes the invisible visible. Modern chips hide every one of these problems behind layers of automated design tools and silicon so complex that no single person understands the whole. Designing a CPU that actually boots Doom — with its branching, its memory fetches, its timing — forces you to confront pipeline stalls, data hazards, and clock-domain crossings the way engineers did when these ideas were new. The game is just a measuring stick; the real deliverable is a working intuition for what a computer does when you count the cycles.